Chips to Start-up: 67,000 trained in chip design
What happened
- Over 1 lakh people have enrolled under the C2S programme and about 67,000 have been trained [PIB].
- The ChipIN Centre ran 6 shared wafer runs and 265+ training sessions [PIB].
Background
- India has about a fifth of the world’s chip design engineers. Most work for foreign firms.
Why it matters
- Home-grown design IP is the gap that C2S is meant to fill.
How to use this in Mains
- As per PIB (2026-01-18): over 1 lakh people have enrolled under the C2S programme and about 67,000 have been trained.
- Home-grown design IP is the gap that C2S is meant to fill.
Quotable data pointThe ChipIN Centre ran 6 shared wafer runs and 265+ training sessions.
PIB: PIB Backgrounder: C2S programme, 18 Jan 2026
Exam angle
UPSC
Prelims: C2S, SCL Mohali.
Practice MCQs
Original practice questions (not PYQs).
Practice · UPSC
Trained so far
Answer (b) & explanation
PIB.
Practice · UPSC
Shared wafer runs
Answer (b) & explanation
PIB.
Practice · UPSC
SCL is located at
Answer (b) & explanation
PIB.
Go deeper
Official source: PIB: PIB Backgrounder: C2S programme, 18 Jan 2026
facts from cited sources only; faculty review pending